ASIC/FPGA Designer - clearance required - 562cj
Permanent

Responsibilities
ASIC/FPGA Designer:

  • Responsible for designing ASICs/FPGAs/CPLDs that contain high-speed digital circuits.
  • Will work with systems engineers to translate system requirements into ASIC/FPGA/CPLD requirements, and functional and performance specifications.
  • Perform the design, including interfacing directly with PWA developers.
  • Responsible for ASIC/FPGA/CPLD board-level integration and test, working in concert with cognizant system and software engineers. 
  • keywords: asic, FPGA, cpld, vhdl, systems engineer, electrical engineer, ee, circuit design, digital

    Requirements:

  • DOD Secret (or higher) clearance is required.
  • BS in Electrical Engineering required; MS in Electrical Engineering is preferred.
  • Minimum 8 years of digital ASIC/FPGA/CPLD design experience and board-level integration and test.
  • Experience must include a detailed knowledge of high-speed digital ASIC/FPGA/CPLD design and simulation.
  • A specific working knowledge of VHDL (Visual elite preferred), Synthesis (Synplicity, Synopsys) and design analysis tools (Modelsim) is preferred.
  • Additional experience with ASIC floor planning tools and/or high-speed digital PWA design and board-level circuit design is a plus.
  • Philadelphia, PA job location, relocation available

    • Location:

    Pennsylvania, United States

    Start Date:

    Rate:

    80000 - 105000 USD

    Contact:

    Russ Bray, Cpc
    Please send Resumes (CV's) as WORD (any version) attachments.

    Open To:

    Applicants must be eligible to work in the specified location

    Posted Date:

    13/10/2009

    Reference:

    JS2484005/562CJ/1037012- (PLEASE quote this reference number.)